1. Field of the Invention
The invention relates to a method and to a device for adapting/tuning signal transit times on line systems or networks between integrated circuits which are mounted on printed circuit boards, in particular high-speed memory modules, and to a memory group which can be manufactured using the latter.
In high-speed memory modules, so-called high performance DRAMs, the signal transit times of different networks or signal transmission lines must be tuned to one another, at the module or system level, within a few picoseconds in order to ensure the desired speed and efficiency of the memory module.
Such differences in transit times are mainly influenced by the capacitive element of the individual housings with which a memory module is equipped. However, due to manufacturing process limits, the individual components can be tuned to one another and to the printed circuit board only within an order of magnitude of approximately 20 fF. This is sufficient for a maximum delay time window of approximately 20 ps. The fine tuning must be carried out on the application chip after appropriate measurement. It is usually necessary to repeat this measuring and tuning step. If relatively small delay time windows and finer tuning are necessary, it has until now been the practice to make use of expensive base materials such as ceramics and/or to apply C4 mounting techniques.